; Matt Heffernan ; Control Memory Configuration ; ; Fields ; ;A B C D E F G H I J K L M N ;----------------------------------------- 0 0 0 1 8 0 10 0 0 0 0 1 0 0 ;0 MAH <- PCH 0 0 0 1 2 0 11 0 0 0 0 2 0 0 ;1 MAL <- PCL;Read 0 0 0 5 1 0 15 0 0 0 0 3 0 0 ;2 MW <- AC 0 0 0 9 2 0 2 0 0 0 0 4 0 0 ;3 PCL <- PCL plus 1 3 0 0 0 0 0 0 0 0 3 0 6 1 0 ;4 IR <- MBUS; BCS 7 0 0 0 0 0 0 0 0 0 3 0 8 1 0 ;5 BCS 9 0 0 0 1 8 0 10 0 0 0 0 16 2 0 ;6 MAH <- PCH; 16-way on IRH 0 0 0 9 8 0 8 0 0 0 0 6 0 0 ;7 PCH <- PCH plus 1 1 0 0 1 8 0 10 0 0 0 0 48 2 0 ;8 MD <- MBUS; 16-way on IRH 0 0 0 9 8 0 8 0 0 0 0 8 0 0 ;9 PCH <- PCH plus 1 1 0 0 0 0 4 10 0 0 0 0 17 0 0 ;10 MD <- MBUS; MAH <- T 0 0 0 9 8 0 8 0 0 0 0 10 0 0 ;11 PCH <- PCH plus 1 0 0 0 0 0 0 0 0 0 0 0 25 0 0 ;12 BRA 25 0 0 0 8 0 6 10 0 0 0 0 22 0 0 ;13 MAH <- MAH plus 1 0 0 0 9 2 0 2 0 0 0 0 15 0 0 ;14 PCL <- PCL plus 1 0 0 0 0 0 0 0 0 0 3 0 10 1 0 ;15 BCS 11 0 0 0 1 2 0 11 0 0 0 0 29 0 0 ;16 MAL <- PCL; Read 0 0 0 0 0 1 11 0 0 0 0 47 0 0 ;17 MAL <- MD; Read 1 0 0 0 0 0 0 0 0 0 0 56 0 0 ;18 MD <- MBUS 1 0 0 0 0 0 0 0 0 0 0 21 0 0 ;19 MD <- MBUS 0 0 0 1 2 0 11 0 0 0 0 29 0 0 ;20 MAL <- PCL; Read 0 0 0 0 0 1 12 0 0 0 0 60 0 0 ;21 T <- MD 0 0 0 0 0 5 11 0 0 0 0 23 0 0 ;22 MAL <- MAL; Read 0 0 0 0 0 0 0 0 0 0 0 12 0 0 ;23 BRA 12 0 0 0 1 2 0 11 0 0 0 0 29 0 0 ;24 MAL <- PCL; Read 1 0 0 0 0 4 10 0 0 0 0 26 0 0 ;25 MD <- MBUS; MAH <- T 0 0 0 0 0 1 11 0 0 0 0 27 0 0 ;26 MAL <- MD; Read 0 0 0 0 0 0 0 0 0 0 0 64 0 0 ;27 BRA 64 0 0 0 0 0 0 0 0 0 0 0 80 3 0 ;28 16-way on IRL 0 0 0 9 2 0 2 0 0 0 0 5 0 0 ;29 PCL <- PCL plus 1 0 0 0 1 2 0 11 0 0 0 0 41 0 0 ;30 MAL <- PCL; Read 0 0 0 0 0 0 0 0 0 3 0 12 1 0 ;31 BCS 13 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ;32 AC <- MD 0 0 0 2 1 1 1 0 1 0 0 0 0 0 ;33 AC <- AC plus MD; LoadFlags 0 0 0 4 1 1 1 0 0 0 0 103 0 0 ;34 AC <- AC * MD 0 0 0 5 1 1 1 0 0 0 0 103 0 0 ;35 AC <- AC + MD 0 0 0 0 0 1 9 0 0 0 0 30 0 0 ;36 SPH <- MD 0 0 0 4 5 2 12 2 0 0 0 49 0 0 ;37 CONST <- 2; T <- CONST * FLAGS 0 0 0 4 5 2 12 8 0 0 0 49 0 0 ;38 CONST <- 8; T <- CONST * FLAGS 0 0 0 4 5 2 12 1 0 0 0 49 0 0 ;39 CONST <- 1; T <- CONST * FLAGS 0 0 0 0 0 5 13 0 0 0 0 59 0 0 ;40 MAL <- MAL; Write 0 0 0 9 2 0 2 0 0 0 0 42 0 0 ;41 PCL <- PCL plus 1 0 0 0 0 0 0 0 0 0 3 0 50 1 0 ;42 BCS 51 0 0 0 4 5 2 12 4 0 0 0 62 0 0 ;43 CONST <- 4; T <- CONST * FLAGS 0 0 0 0 0 1 3 0 0 0 0 0 0 0 ;44 SPL <- MD 0 0 0 0 0 6 8 0 0 0 0 53 0 0 ;45 PCH <- MAH 0 0 0 0 0 6 12 0 0 0 0 63 0 0 ;46 T <- MAH 0 0 0 0 0 0 0 0 0 0 0 64 2 0 ;47 16-way on IRH 0 0 0 0 0 1 12 0 0 0 0 101 0 0 ;48 T <- MD 0 0 0 0 0 0 0 0 0 1 0 54 1 0 ;49 BEQ 55 1 0 0 0 0 0 0 0 0 0 0 44 0 0 ;50 MD <- MBUS 0 0 0 9 8 0 8 0 0 0 0 50 0 0 ;51 PCH <- PCH plus 1 0 0 0 0 0 1 12 0 0 0 0 101 0 0 ;52 T <- MD 0 0 0 0 0 5 2 0 0 0 0 0 0 0 ;53 PCL <- MAL 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ;54 BRA 0 0 0 0 0 0 6 8 0 0 0 0 53 0 0 ;55 PCH <- MAH 0 0 0 0 0 0 0 0 0 0 0 32 3 0 ;56 16-way on IRL 0 0 0 0 0 1 8 0 0 0 0 0 0 0 ;57 PCH <- MD 1 0 0 0 0 0 0 0 0 0 0 57 0 0 ;58 MD <- MBUS 0 0 0 0 0 0 0 0 0 0 0 54 0 0 ;59 BRA 54 0 0 0 8 0 5 11 0 0 0 0 31 0 0 ;60 MAL <- MAL plus 1; Read 0 0 0 0 0 0 0 0 0 0 0 58 0 0 ;61 BRA 58 0 0 0 0 0 0 0 0 0 1 0 66 1 0 ;62 BEQ 67 0 0 0 0 0 5 14 0 0 0 0 65 0 0 ;63 U <- MAL 0 0 0 0 0 0 0 0 0 0 0 18 0 0 ;64 BRA 18 0 0 0 1 8 0 15 0 0 0 0 69 0 0 ;65 MW <- PCH 0 0 0 0 0 6 8 0 0 0 0 53 0 0 ;66 PCH <- MAH 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ;67 BRA 0 0 0 0 0 0 0 0 0 0 0 0 19 0 0 ;68 BRA 19 0 0 0 1 9 0 10 0 0 0 0 70 0 0 ;69 MAH <- SPH 0 0 0 1 3 0 13 0 0 0 0 71 0 0 ;70 MAL <- SPL; Write 0 0 0 12 3 2 3 1 0 0 0 74 0 0 ;71 SPL <- SPL minus 1 (CONST = 1) 0 0 0 1 2 0 15 0 0 0 0 75 0 0 ;72 MW <- PCL 0 0 0 12 9 2 9 1 0 0 0 72 0 0 ;73 SPH <- SPH minus 1 (CONST = 1) 0 0 0 0 0 0 0 0 0 3 0 72 1 0 ;74 BCS 73 0 0 0 1 9 0 10 0 0 0 0 76 0 0 ;75 MAH <- SPH 0 0 0 1 3 0 13 0 0 0 0 77 0 0 ;76 MAL <- SPL; Write 0 0 0 12 3 2 3 1 0 0 0 87 0 0 ;77 SPL <- SPL minus 1 (CONST = 1) 0 0 0 0 0 4 8 0 0 0 0 88 0 0 ;78 PCH <- T 0 0 0 12 9 2 9 1 0 0 0 78 0 0 ;79 SPH <- SPH minus 1 (CONST = 1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ;80 BRA 0 0 0 0 8 0 0 1 0 1 0 0 0 0 0 ;81 AC <- AC plus 1; LoadFlags 0 3 1 1 5 0 12 0 0 0 0 89 0 0 ;82 L <- Cout; T <- shr(FLAGS) 0 0 0 9 3 0 3 0 0 0 0 91 0 0 ;83 SPL <- SPL plus 1 0 0 0 15 0 0 1 0 0 0 0 103 0 0 ;84 AC <- 0 0 0 0 0 0 0 0 0 0 0 0 104 0 0 ;85 BRA 104 (end of CM) 0 0 0 13 0 0 1 0 0 0 0 103 0 0 ;86 AC <- NOT(AC) 0 0 0 0 0 0 0 0 0 3 0 78 1 0 ;87 BCS 79 0 0 0 0 0 7 2 0 0 0 0 0 0 0 ;88 PCL <- U 0 0 2 0 0 0 1 0 0 0 0 103 0 0 ;89 AC <- shl(AC) 0 0 0 0 0 0 0 0 0 0 0 61 0 0 ;90 BRA 61 0 0 0 0 0 0 0 0 0 3 0 92 1 0 ;91 BCS 93 0 0 0 1 9 0 10 0 0 0 0 94 0 0 ;92 MAH <- SPH 0 0 0 9 9 0 9 0 0 0 0 92 0 0 ;93 SPH <- SPH plus 1 0 0 0 1 3 0 11 0 0 0 0 95 0 0 ;94 MAL <- SPL; Read 0 0 0 9 3 0 3 0 0 0 0 96 0 0 ;95 SPL <- SPL plus 1 0 0 0 0 0 0 0 0 0 3 0 98 1 0 ;96 BCS 99 0 0 0 0 0 1 2 0 0 0 0 102 0 0 ;97 PCL <- MD 1 0 0 0 0 0 0 0 0 0 0 97 0 0 ;98 MD <- MBUS 0 0 0 9 9 0 9 0 0 0 0 98 0 0 ;99 SPH <- SPH plus 1 0 0 0 1 3 0 11 0 0 0 0 90 0 0 ;100 MAL <- SPL; Read 0 0 0 1 2 0 11 0 0 0 0 14 0 0 ;101 MAL <- PCL; Read 0 0 0 1 9 0 10 0 0 0 0 100 0 0 ;102 MAH <- SPH 0 0 0 0 0 0 0 0 1 0 0 0 0 0 ;103 LoadFlags 999 999 999 999 999 999 999 999 999 999 999 999 999 999 ; 104 (end of CM)